PCIe® (peripheral component interconnect express) is an interface standard for connecting high-speed components in a computer or server. Basically, it is how all major components inside a computer talk with each other. Those components include CPUs, GPUs, SSDs, Hard Drives, Sound Cards, and Wi-Fi Cards, among others.

PCIe® Gen 1 was initially developed in 2000 and released in 2002.  The Gen 4 spec was released in 2017.  So, it took 15 years to develop four generations.  As an indicator of how fast bandwidth is expanding, the time gap between Gen 5 and Gen 6 will only be 2 years.

Keep in mind, the newer generation spec is not just a replacement of the old one.  It is a faster version designed for different applications.  PCIe® Gen 3, Gen 4, and future generation applications will exist in the market simultaneously for a long time.

In a personal computer, normally all PCIe® connections are handled by the standard designed connector; like the CEM PCIe®  connector, M.2 connector and U.2 connector.


However, in blade server or datacenter applications, backplane connectors are often used to support more complicated system structures, higher density, and better channel SI performance.

After the PCIe®  5.0 standard was released in 2019, system designers found that designing a Gen 5 system was much harder than a PCIe®  4.0 based system.  There are the major challenges:

  • The higher signal frequencies increase copper loss and power loss, which causes transmission distances to decrease. Re-timers are required more often (which adds cost).
  • The channel loss in higher signal frequencies will cause signal integrity (SI) issues. PCB design, footprint and breakout area design, and connector selection all become more critical.
  • A PCB material move from FR4 to Megtron (added cost).
  • Forward and backward mating compatibility requirement to leverage the install base and protect future generation performance.
  • PCB traces may need to be spaced-out further for better jitter performance, resulting in a larger and more expensive PCB.
  • Via stub back-drilling is required, which is an incremental step in the board manufacturing process (added cost).

Amphenol’s high speed backplane group offers two product families that allow system designers to overcome these challenges and minimize their overall system cost:

  • The ExaMAX® product line offers decent signal density and first-class electrical performance, while giving system designers wide selections of different configurations.
  • The XCede® HD product line offers the highest density in the industry, is tooled in muliple configuratons/pair types, and is ideal for storage or space limited applications.

In the ExaMAX® family, the ExaMAX® VS version can support up to PCIe®  4.0 speed. Standard ExaMAX® can support PCIe®  5.0 very well and has been selected and qualified by both Intel and AMD. A newly designed and released ExaMAX®2 version is targeting support of future PCIe®  Gen 6 and higher speed specifications.

Most importantly, all the different versions of ExaMAX® can support cross mating, either forward or backward mating applications. This gives system designers confidence that the systems they have or will design have enough headroom for future upgrades. Because different versions can be selected, system designers can also choose the right configurations to drive their overall system cost lower.

Another major advantage of the ExaMAX® family is that ExaMAX® is currently tooled in all mainstream configurations and structures, which include 2-, 3-, 4-, 6-, and 8-Pair per column configurations, as well as backplane, coplanar, reverse coplanar, direct orthogonal, mid plane orthogonal, mezzanine and cable structures.

The XCede® HD product family suits any PCIe® application perfectly given the various generations that scale to meet specific performance requirements.  Starting with XCede® HD LC, this product can support up to PCIe® 3.0 speeds easily. For PCIe® 4.0, designers can use standard XCede® HD and leverage XCede® HD Plus if extra signal integrity margin is required.  XCede® HD2 was introduced to support PCIe® 5 and XCede® HD3 (in development) is targeting support of 112G PAM4 with future PCIe® Gen 6 support in mind. 

As a high-density, high-speed backplane connector, the XCede® HD product line provides a robust solution for tighter card pitches and chassis designs where space requirements and density are critical. All generations within the XCede® HD product family are mating compatible, which provides great scalability for customers to design more cost-effective systems.

XCede® HD is designed in modular construction with integrated power and guidance options. In addition to traditional backplane, various derivatives including co-planar, stacker and midplane configurations are available as well.